The invention relates to chemical mechanical polishing of substrates, and more particularly to an article for polishing a substrate.
Integrated circuits are typically formed on substrates, particularly silicon wafers, by the sequential deposition of conductive, semiconductive or insulative layers. After each layer is deposited, it is etched to create circuitry features. As a series of layers are sequentially deposited and etched, the outer or uppermost surface of the substrate, i.e., the exposed surface of the substrate, becomes increasingly nonplanar. This nonplanar surface presents problems in the photolithographic steps of the integrated circuit fabrication process. Therefore, there is a need to periodically planarize the substrate surface to provide a planar surface. Planarization, in effect, polishes away a non-planar, outer surface, whether a conductive, semiconductive, or insulative layer, to form a relatively flat, smooth surface.
Chemical mechanical polishing is one accepted method of planarization. This planarization method typically requires that the substrate be mounted on a carrier or polishing head, with the surface of the substrate to be polished exposed. The substrate is then placed against a rotating polishing pad. In addition, the carrier head may rotate to provide additional motion between the substrate and polishing surface. Further, a polishing slurry, including an abrasive and at least one chemically active agent, may be spread on the polishing pad to provide an abrasive chemical solution at the interface between the pad and substrate.
The effectiveness of a CMP process may be measured by its polishing rate and by the resulting finish (roughness) and flatness (lack of large scale topography) of the substrate surface. Inadequate flatness and finish can produce substrate defects. The polishing rate sets the time needed to polish a layer and the maximum throughput of the polishing apparatus.
A typical polishing pad is a hard composite material with a roughened polishing surface. In one example, a typical polishing pad may have a hard upper layer composed of polyurethane mixed with other fillers and a softer lower layer composed of compressed felt fibers leached with polyurethane. A two-layer polishing pad, with the upper layer composed of IC-1000 and the lower layer composed of SUBA-4, is available from Rodel, Inc., located in Newark, Del. (IC-1000 and SUBA-4 are product names of Rodel, Inc.). The polishing pad may be attached to a rotating platen by a pressure-sensitive adhesive layer.
A slurry containing a reactive agent (e.g., deionized water for oxide polishing), abrasive particles (e.g., silicon dioxide for oxide polishing) and a chemically reactive catalyzer (e.g., potassium hydroxide for oxide polishing), is supplied to the surface of the polishing pad by a slurry supply tube. Sufficient slurry may be provided to cover and wet the entire polishing pad.
A limitation on polishing throughput is "glazing" of the polishing pad. Glazing occurs when the polishing pad is heated and compressed in regions where the substrate is pressed against it. The peaks of the polishing pad are pressed down and the pits of the polishing pad are filled up, so the surface of the polishing pad becomes smoother. As a result, the polishing time required to polish a substrate increases. Therefore, the polishing pad surface must be periodically returned to an abrasive condition, or "conditioned", to maintain a high throughput. The conditioning process is destructive and reduces the lifetime of the polishing pad.
An additional consideration in the production of integrated circuits is process and product stability. To achieve a low defect rate, each substrate should be polished under similar conditions. However, polishing pads vary from pad to pad. This variability may lead to substrate surface variability.
Another consideration about conventional polishing pads is the inefficient use of slurry. During the polishing process, a large amount of slurry is lost off the sides of the rotating polishing pad.